2024 · 28 citations · 4 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureLow-power DesignSystem-on-chip DesignMemory HierarchyMemory Hierarchy DesignMemory Subsystem DesignArea EfficiencyArea-efficiency TradeoffsDensityDigital Logic CircuitsMemory Circuit DesignMemory ScalingPower-efficient Memory DesignStorage
Digital computing-in-memory (DCIM) has showcased its superiority in terms of throughput and accuracy as it scales down toward advanced technology nodes [1] –[3]. However, the inherent computation scheme imposes a limitation on both density and efficiency on the order of conventional digital logic. More specifically, many DCIM macros behave more like compute cores rather than memory modules where the digital logic dominates the macro area. Previous approximate and analog CIM designs [4] –[6] relieve the problem of storage density at the cost of lower SNR or throughput, leading to a challenging trade-off between accuracy, area efficiency, and storage density.
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Dewei Wang, Chuan-Tung Lin, Gregory K. Chen et al. · 2022 IEEE International Solid- State Circuits Conference (ISSCC) · 2022 · 108 citations
Engineering, Computer Engineering, Electrical Engineering +16
Chia-Fu Lee, C.W. Lu, Cheng-En Lee et al. · 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2022 · 77 citations