Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications

TLDR

Advances in CMOS technology increase flip‑flop vulnerability to soft errors, notably single‑node and double‑node upsets. The paper introduces two radiation‑hardened flip‑flop designs, a DNU‑tolerant FF (DUT‑FF) and a DNU‑recoverable FF (DUR‑FF). The DUT‑FF comprises four dual‑interlocked storage cells and three 2‑input C‑elements, while the DUR‑FF relies on six interlocked DICEs to achieve self‑recovery. Simulations confirm that both designs fully tolerate or recover from SNUs and DNUs, with the DUT‑FF being cost‑effective and the DUR‑FF offering complete self‑recovery, though both incur area overhead; both also exhibit low delay, making them suitable for high‑performance applications.

Abstract

The continuous advancement of complementary metal-oxide-semiconductor technologies makes flip-flops (FFs) vulnerable to soft errors. Single-node upsets (SNUs), as well as double-node upsets (DNUs), are typical soft errors. This article proposes two radiation-hardened FF designs, namely DNU-tolerant FF (DUT-FF) and DNU-recoverable FF (DUR-FF). First, the DUT-FF which mainly consists of four dual-interlocked-storage-cells (DICEs) and three 2-input C-elements, is proposed. Then, to provide complete self-recovery from DNUs, the DUR-FF which mainly uses six interlocked DICEs is proposed. They have the following advantages: 1) They can completely protect against SNUs as well as DNUs; 2) the DUT-FF is cost-effective but the DUR-FF can provide complete self-recovery from any DNU. Simulations show the complete SNU/DNU tolerance of DUT-FF and the complete SNU/DNU self-recovery of DUR-FF but at the cost of indispensable area overhead when compared to the SNU hardened FFs. Besides, compared to the FFs of the same-type, the proposed FFs achieve a low delay making them suitable for high-performance applications.