Concepedia

Publication | Closed Access

Capacitorless DRAM Cells Based on High-Performance Indium-Tin-Oxide Transistors With Record Data Retention and Reduced Write Latency

47

Citations

16

References

2022

Year

Abstract

In this work, capacitorless memory cells using high mobility ultrathin indium-tin-oxide (ITO) channel are successfully demonstrated, addressing the retention and latency challenges in 2T0C DRAM cells based on wide bandgap oxide semiconductors. The short channel 50 nm ITO FET shows excellent transconductance exceeding <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$300 ~\mu \text{S}/\mu \text{m}$ </tex-math></inline-formula> and record-high on-state current of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$990 ~\mu \text{A}/\mu \text{m}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1450 ~\mu \text{A}/\mu \text{m}$ </tex-math></inline-formula> at room temperature and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$85 ^{\circ} \text{C}$ </tex-math></inline-formula> at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{\text {ds}} =0.5$ </tex-math></inline-formula> V. BEOL-compatible 2T0C DRAM cells exhibit record-long retention time of 2250 s and 425 s at room temperature and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$85 ^{\circ} \text{C}$ </tex-math></inline-formula> , respectively, owing to the low off-state leakage current from the wide bandgap. A fast write speed of 100 ns can be obtained experimentally, with a projected value down to ~ 1 ns, owing to the high on-current of the ITO access transistor, much faster than previously projected values. This work shows the potential of the ITO transistor for future nonvolatile monolithic 3D DRAM.

References

YearCitations

Page 1