IEEE Journal of Solid-State Circuits · 2022 · 61 citations · 36 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureEdge ComputingMemoryLow-power Digital Circuit DesignPower ManagementEnergy-efficient Memory DesignEnergy-efficient Memory SystemsMultiply-accumulate UnitsNon-volatile MemoryPower-efficient Memory DesignPrecisionProcess Variation ToleranceReadout
Compute-in-memory (nvCIM) macros based on non-volatile memory make it possible for artificial intelligence (AI) edge devices to perform energy-efficient multiply-and-accumulate (MAC) operations by minimizing the movement of data between the processors and memory. However, nvCIM imposes tradeoffs between energy efficiency, computing latency, and readout accuracy against process variation. To overcome these challenges, this work proposed a nvCIM macro featuring: 1) a direct-current-free time-space-based in-memory computing (DCFTS-IMC) scheme; 2) a wordline-based serial access computing (WSAC) scheme; 3) an integration-based voltage-to-time converter (IVTC); and 4) a hidden-latency time-to-MAC value conversion (HLTMC) scheme. The proposed 22-nm 8-Mb resistive random access memory-CIM (ReRAM-CIM) macro was fabricated to demonstrate MAC operations with 8-b input, 8-b weight, and 19-b output. Our nvCIM macro achieved computing latency of 14.4 ns under 8-b precision with an energy efficiency of 21.6 TOPS/W.
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