A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links

Timothy O. Dickson, Zeynep Toprak-Deniz, Martin Cochet, Marcel Kossel, Thomas Morf, Young‐Ho Choi, Pier Andrea Francese, Matthias Brändli, T. Beukema, Christian Baks,

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2022 · 10 citations · 0 references

Concepts

Abstract

A DAC-based SST transmitter for wireline applications is reported in a 4nm FinFET technology. 8b resolution and high analog output bandwidth (BW) are achieved by employing a segmented architecture along with a single-ended LSB. Hybrid analog/digital tuning is used in the DAC LSB segments, resulting in well-matched MSB/LSB segments with -0.63/0.67 LSB INL and -0.16/0.43 LSB DNL. 216Gb/s PAM8 and 212Gb/s QAM64 OFDM operation are demonstrated at 288mW from a 0.95V supply.