Matthias Brändli

A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS

Lukas Kull, Thomas Toifl, Martin Schmatz et al. · IEEE Journal of Solid-State Circuits · 2013 · 324 citations · Full text

Enhanced Speed, Reference Capacitor, Engineering +11

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference

Manuel Le Gallo, Riduan Khaddam-Aljameh, Miloš Stanisavljević et al. · Nature Electronics · 2023 · 234 citations · Full text

Engineering, Hardware Acceleration, Computer Engineering +8

A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology

John F. Bulzacchelli, Christian Menolfi, T. Beukema et al. · IEEE Journal of Solid-State Circuits · 2012 · 174 citations

Electrical Engineering, Engineering, Vlsi Design +8

HERMES-Core—A 1.59-TOPS/mm² PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs

Riduan Khaddam-Aljameh, Miloš Stanisavljević, Jordi Fornt et al. · IEEE Journal of Solid-State Circuits · 2022 · 120 citations · Full text

Electrical Engineering, Engineering, Vlsi Design +13

4.7 A sub-ns response on-chip switched-capacitor DC-DC voltage regulator delivering 3.7W/mm² at 90% efficiency using deep-trench capacitors in 32nm SOI CMOS

Toke Meyer Andersen, Florian Krismer, Johann W. Kolar et al. · 2014 · 97 citations