Publication | Open Access
Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning
119
Citations
62
References
2022
Year
EngineeringAmorphous Gate OxidesTwo-dimensional SemiconductorsSemiconductor DeviceSemiconductorsGraphene NanomeshesElectronic DevicesNanoelectronicsHafnium DioxideElectrical EngineeringPhysicsBias Temperature InstabilityFermi-level TuningSemiconductor Device FabricationMicroelectronicsApplied PhysicsGrapheneGraphene NanoribbonFermi LevelTwo-dimensional Transistors
Electronic devices based on two-dimensional semiconductors suffer from limited electrical stability because charge carriers originating from the semiconductors interact with defects in the surrounding insulators. In field-effect transistors, the resulting trapped charges can lead to large hysteresis and device drifts, particularly when common amorphous gate oxides (such as silicon or hafnium dioxide) are used, hindering stable circuit operation. Here, we show that device stability in graphene-based field-effect transistors with amorphous gate oxides can be improved by Fermi-level tuning. We deliberately tune the Fermi level of the channel to maximize the energy distance between the charge carriers in the channel and the defect bands in the amorphous aluminium gate oxide. Charge trapping is highly sensitive to the energetic alignment of the Fermi level of the channel with the defect band in the insulator, and thus, our approach minimizes the amount of electrically active border traps without the need to reduce the total number of traps in the insulator.
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