Self-heating characterization and extraction method for thermal resistance and capacitance in high voltage MOSFETs

Abstract

This work reports on the self-heating effect (SHE) characterization of HV DMOSFETs and the accurate extraction of the equivalent thermal impedance of the device (thermal resistance, R/sub TH/, and capacitance, C/sub TH/) needed for advanced device and IC simulation. A simple pulsed-gate experiment is proposed and the influence of its parameters (pulse duration and duty factor) are analysed. It is demonstrated that in our 100 V DMOSFET, SHE is cancelled by using pulses with duration less that 2 /spl mu/s and duty factor lower that 1:100. The new extraction method of device thermal resistance and capacitance exploits analytical modelling and dedicated extraction plots using the measurements of output characteristics at various applied pulses and the gradual reduction of SHE with pulse duration and duty factor. Both R/sub TH/ and C/sub TH/ are assumed and extracted in saturation region as quasi-independent functions of the device bias (injected power) at a given external temperature. We originally report on the temperature dependence of the HV device thermal resistance that is shown to be a linear function of external temperature (in our device, R/sub TH/ could increase by almost 100% over 100/spl deg/C). SPICE simulations with the extracted thermal R/sub TH/-C/sub TH/ circuit are finally used to fully validate the proposed method.