Publication | Closed Access
On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
123
Citations
10
References
2002
Year
Unknown Venue
Circuit ComplexityEngineeringFormal VerificationLogic ProgrammingComputational LogicMany-valued LogicMulti-level Logic SynthesisVariable OrderingComputer EngineeringComputer ScienceBinary Decision DiagramsBinary Decision DiagramAlgorithmic DevelopmentVariable Ordering AlgorithmLogic SynthesisCircuit DesignCover PatternsAutomated ReasoningProgram AnalysisFormal MethodsProgram Synthesis
Develops multi-level logic minimization programs using binary decision diagram (BDD). The authors present variable ordering methods of BDD. The variable ordering algorithm for two-level circuits is based on cover patterns and selects most binate variables first, and the one for multi-level circuits is based on depth first traverse of circuits. In both cases, the acquired variable orderings are optimized by exchanging a variable with its neighbor in the ordering.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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