Yusuke Matsunaga

On variable ordering of binary decision diagrams for the application of multi-level logic synthesis

Masahiro Fujita, Yusuke Matsunaga, Taeko Kakuda · European Design Automation Conference · 1991 · 193 citations

Circuit Complexity, Engineering, Computer Architecture +18

On variable ordering of binary decision diagrams for the application of multi-level logic synthesis

Masahiro Fujita, Yusuke Matsunaga, Taeko Kakuda · 2002 · 123 citations

Circuit Complexity, Engineering, Formal Verification +18

An efficient equivalence checker for combinational circuits

Yusuke Matsunaga · 1996 · 97 citations

Logic Synthesis, Efficient Equivalence Checker, Engineering +11

Variable ordering algorithms for ordered binary decision diagrams and their evaluation

Masahiro Fujita, Hisanori Fujisawa, Yusuke Matsunaga · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1993 · 72 citations

Mathematical Programming, Circuit Complexity, Engineering +20

Multi-level logic optimization using binary decision diagrams

Yusuke Matsunaga, Masahiro Fujita · 2003 · 63 citations

Circuit Complexity, Engineering, Computer Architecture +16