Dynamic V/sub TH/ scaling scheme for active leakage power reduction

Abstract

We present a Dynamic V/sub TH/ Scaling (DVTS) scheme to save the leakage power during active mode of the circuit. The power saving strategy of DVTS is similar to that of the Dynamic V/sub DD/ Scaling (DVS) scheme, which adaptively changes the supply voltage depending on the current workload of the system. Instead of adjusting the supply voltage, DVTS controls the threshold voltage by means of body bias control, in order to reduce the leakage power. The power saving potential of DVTS and its impact on dynamic and leakage power when applied to future technologies are discussed. Pros and cons of the DVTS system are dealt with in detail. Finally, a feedback loop hardware for the DVTS which tracks the optimal V/sub TH/ for a given clock frequency, is proposed. Simulation results show that 92% energy savings can be achieved with DVTS for 70 nm circuits.