VHSIC Hardware Description (VHDL) Development Program

Abstract

The VHSIC Program has realized the importance of a standard hardware description language to facilitate the design and documentation of future military digital systems incorporating VHSIC technology. To that end, the VHSIC Hardware Description Language Development Program has been organized to generate a language and an associated hierarchical simulator. The paper briefly covers some background information and then outlines the general structure of the program. The latter is explained with respect to the requirements of the VHSIC Hardware Description Language effort and how the tasks have been designed to meet the requirements.