Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) · 2002 · 19 citations · 16 references
ComputingComputer EngineeringComputer ScienceAlgorithmsComputer ArchitectureSchedulingAlgorithm AnalysisLayout OptimizationConstraintsFloorplanningFloorplanning For Network-on-chipLayout AlgorithmsLongest Common SubsequenceLongest Common SubstringPerformance ConstraintsPlacement Algorithms
In this paper, we present a floorplanning algorithm based on sequence pair representation. Our floorplanner has the following important features: (1) It is explicitly designed for fixed-frame floorplanning, which is different from traditional well-researched min-area floorplanning. Moreover, we also show that it can be adapted to minimize total area. (2) It addresses the problem of handling alignment constraint which arises in bus structure. (3) It deals with performance constraint such as bounded net delay, while many existing floorplanners just minimize total wire length. (4) More importantly, even with all these constraints the algorithm is very fast in that it evaluates the feasibility of a sequence pair and translates to a floorplan in O(n log log n) time typically where n is the number of blocks and the number of constrained blocks is O(n), which is significantly faster than the O(n/sup 3/) method operating on constraint graph. Our algorithm is based on computing the longest common subsequence of a pair of weighted sequences. Experimental results on MCNC benchmark for block placement show the promise of the method.
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Yun-Chih Chang, Yao‐Wen Chang, Guangming Wu et al. · 2000 · 544 citations · Full text
Module placement on BSG-structure and IC layout applications
Shigetoshi Nakatake, Kunihiro Fujiyoshi, Hideyuki Murata et al. · 2002 · 180 citations
Engineering, Computer Engineering, Computer-aided Design +15
Classical floorplanning harmful?
Andrew B. Kahng · 2000 · 151 citations