Floorplanning
Floorplanning is a key physical design phase in the hierarchical design of digital integrated circuits, specifically within very-large-scale integration layout, that determines the approximate positions of circuit components, blocks, and interconnects on a chip to optimize area, performance, and routability while adhering to design constraints.
522
Publications
22.6K
Citations
981
Authors
266
Institutions
Publications per year
2017–2026
42
522
A New Algorithm for Floorplan Design
Martin D. F. Wong, C. L. Liu · Design Automation Conference · 1986 · 478 citations
Architecture, Industrial Engineering, Algorithmic Design +12
A thermal-driven floorplanning algorithm for 3D ICs
Generic global placement and floorplanning
Hans Eisenmann, Frank Johannes · 1998 · 396 citations
1–5 of 522
981
University of Illinois Urbana-Champaign, United States
39 publications · 2.2K citations
24
h-index
21
h-index
Chinese University of Hong Kong, Hong Kong SAR China
22 publications · 611 citations
18
h-index
16
h-index
15
h-index
1–5 of 981
266
University of California San Diego
San Diego, United States
20 h-index
49 publications
1.9K citations
Tsinghua University
Beijing, China
20 h-index
116 publications
4.6K citations
Chinese University of Hong Kong
Hong Kong, Hong Kong
20 h-index
54 publications
1.5K citations
The University of Texas at Austin
Austin, United States
20 h-index
61 publications
2.1K citations

National Taiwan University
Taipei, Taiwan
19 h-index
56 publications
2.1K citations
University of Illinois Urbana-Champaign
Urbana, United States
18 h-index
45 publications
2.9K citations
Iowa State University
Ames, United States
16 h-index
29 publications
1.2K citations
Georgia Institute of Technology
Atlanta, United States
14 h-index
55 publications
2.2K citations
1–8 of 266
64 publications · 3K citations
33
h-index
18 publications · 1.2K citations
17
h-index
TODAES · 10 publications · 292 citations
10
h-index
Conference · 9 publications · 297 citations
9
h-index
8 publications · 211 citations
8
h-index
1–5