18th Design Automation Conference · 1981 · 142 citations · 2 references
EngineeringComputer ScienceElectrical EngineeringComputer NetworksDigital CommunicationMicroelectronicsCommunication NetworksCommunication SystemsDelay ModelingPropagation DelayTiming AnalysisDelay MinimizationDelay SystemsNetwork Propagation DelayPath Delay AnalysisPath Delay ModelingSignal Propagation Delay
In MOS integrated circuits, signals may propagate between stages with fanout. The MOS interconnect may be modeled by an RC tree. Exact calculation of signal delay through such networks is difficult. However, upper and lower bounds for delay that are computationally simple are presented here. The results can be used (1) to bound the delay, given the signal threshold; or (2) to bound the signal voltage, given a delay time; or (3) to certify that a circuit is "fast enough", given both the maximum delay and the voltage threshold.
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Signal Delay in RC Tree Networks
P. Penfield, J. Rubinstein · 18th Design Automation Conference · 1981 · 142 citations