2008 · 14 citations · 4 references
EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureInstrumentationMicroelectronicsClock Distribution NetworksClock ManagementJitter AnalysisMeasurement UncertaintyNoise In Electronic DevicesTiming AnalysisClock Skew AnalysisClock UncertaintyJitterJitter MeasurementPower Supply NoiseSkew DistributionTiming Noise AnalysisTiming Variability
Timing uncertainty in microprocessors is comprised of several sources including PLL jitter, clock distribution skew and jitter, across chip device variations, and power supply noise. The on-chip measurement macro called SKITTER (SKew+jITTER) was designed to measure timing uncertainty from all combined sources by measuring the number of logic stages that complete in a cycle. This measure of completed delay stages has proven to be a very sensitive monitor of power supply noise, which has emerged as a dominant component of timing uncertainty. This paper describes the Skitter measurement experiences of several IBM microprocessors including PPC970MP, XBOX360 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TM</sup> , CELL Broadband Engine <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TM</sup> , and POWER6 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TM</sup> microprocessors running different workloads.
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The design and implementation of a first-generation CELL processor
D. Pham, S. Asano, M. Bolliger et al. · 2005 · 547 citations
Engineering, Computer Engineering, Electrical Engineering +17
Timing uncertainty measurements on the Power5 microprocessor
P.J. Restle, R. Franch, N. James et al. · 2004 · 44 citations
Engineering, Computer Engineering, Electrical Engineering +13