A Vertical Split-Gate Flash Memory Featuring High-Speed Source-Side Injection Programming, Read Disturb Free, and 100K Endurance for Embedded Flash (eFlash) Scaling and Computing-In-Memory (CIM)

Abstract

We develop a vertical split-gate Flash memory to enable embedded Flash (eFlash) scaling. The device features much smaller cell size (<; 40%) than conventional planar split-gate Flash, high-speed and low-power source-side injection programming (Twrite=100nsec with 6V Vt window, and only ~10uA programming current), 100K endurance and good retention. In addition to the regular memory operation for eFlash, this device also supports high-performance and highly-reliable CIM solutions. We can provide a flexible and tunable Icell ranging from 150nA to 1500nA with very tight distribution (sigma <; 10% of mean value) that can support good accuracy for deep neural network (DNN). The device is totally read-disturb free for the entire lifetime since we can apply read voltage of 0V at the memory gate. Good TOPS/W >30 (at 4-bit resolution, MAC only) and high TOPS/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ~1 can be achieved. The excellent TOPS/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> suggests an effective way to boost the computing performances by designing more multi cores to parallelly compute the DNN using the high-density and low-power CIM memory devices and save data (weight) movements by ~85%.