35.1 An Octa-Core 2.8/2GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC

Abstract

A high-speed and power-efficient heterogeneous octa-core CPU complex is realized in a 7nm FinFET process. On-chip sensors that handle guard band in terms of process (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PGB</sub> ), voltage, temperature (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TGB</sub> ), and aging (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AGB</sub> ) are designed for power enhancement in dynamic frequency and voltage scaling (DVFS). A process sensor (P-sensor) is used to determine per-die V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PGB</sub> for Smartphone operation voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sov</sub> ) with machine learning (ML). A temperature sensor (T-sensor) senses run-time local thermal and temperature inversion (T-inversion) to scale V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TGB</sub> in DVFS. An aging sensor (A-sensor) converts cell degradation to corresponding V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AGB</sub> for aging compensation. Lastly, a voltage sensor (V-sensor) sustains system stability against supply noise. With sensor assistance, the CPU performs up to 2.8GHz speed with 13% power improvement in a fully integrated 5G multi-mode Smartphone SoC that supports the sub-6GHz band with 2.6Gbps upload and 4.7Gbps download speeds.