IEEE Design and Test · 2021 · 65 citations · 11 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsComputer ArchitectureField-programmable Gate ArraysAccelerator ArchitectureAnalog Integrated CircuitsDigital Integrated Circuit DesignField-programmable Gate Array ArchitectureHardware AccelerationMemory Subsystem DesignAccelerator MicroarchitectureAcceleratorsAnalog Circuit DesignAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital ConvertersArea Overhead AnalysisMemory Array Architecture
This article comprehensively investigates analog-to-digital converter (ADC) design for compute-in-memory array. The authors show that 6-bit ADC precision is sufficient to guarantee no loss of accuracy for large arrays, while achieving the best tradeoff between hardware performance and area overhead, compared to prior state-of-the-art designs.
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Ali Shafiee, Anirban Nag, Naveen Muralimanohar et al. · ACM SIGARCH Computer Architecture News · 2016 · 1.5K citations