Electrical and Reliability Characteristics of FinFETs With High-<i>k</i> Gate Stack and Plasma Treatments

Abstract

Effects of high-kgate stacks and plasma treatments on electrical and reliability characteristics of FinFET were comprehensively studied in this work. A higher ONcurrent, higher ON-/OFF-current ratio, smaller subthreshold swing (S.S.), lower gate leakage current, and better reliability characteristics in FinFETs are simultaneously achieved by a HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate stack. The improvement can be attributed to its higher k-value, fewer oxide traps, and oxygen vacancy in gate stack. A higher ON-current of FinFET can be obtained with an F-based plasma treatment, which, however, also induces a larger gate leakage current. A plasma treatment with Fand N-based ambient on gate stack is shown to obtain a higher ON-current and acceptable gate leakage in FinFET. Furthermore, a larger ON-current, higher ON-/OFF-current ratio, and a smaller S.S. in FinFET can be achieved with a TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> stacked gate dielectric.