IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2020 · 163 citations · 38 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureSystem-on-chip DesignVlsi DesignAccelerator ArchitectureDeep LearningGraphics Processing UnitsHardware AccelerationIntegrated Circuit DesignVery-large-scale Integration LayoutAccelerated PlacementDeep Learning AccelerationDeep Learning AcceleratorsDeep Learning On GpusDensityPlacementPlacement AlgorithmsPlacement Optimization
Placement for very large-scale integrated (VLSI) circuits is one of the most important steps for design closure. We propose a novel GPU-accelerated placement framework DREAMPlace, by casting the analytical placement problem equivalently to training a neural network. Implemented on top of a widely adopted deep learning toolkit PyTorch, with customized key kernels for wirelength and density computations, DREAMPlace can achieve around 40× speedup in global placement without quality degradation compared to the state-of-the-art multithreaded placer RePlAce. We believe this work shall open up new directions for revisiting classical EDA problems with advancements in AI hardware and software.
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