IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2019 · 17 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringDigital CommunicationLow-power DesignMicroelectronicsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyDynamic Power ReductionInterference ManagementLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignBit Error RateLow-power Circuit DesignSense Amplifier DesignSingle-ended Signaling
For the first time, we prove that 7.8-Gb/s single-ended signaling through a highly reflective channel is feasible at low energy cost by an energy-efficient many-tap decision feedback equalization (DFE) receiver (RX). The reported data rate of 7.8 Gb/s is the fastest data rate that has been achieved through a single-ended highly reflective channel that has more than five taps of postcursor reflective intersymbol interference. Compared with the prior arts, the target multidrop has the most in-band notches: ten notches. To compensate for large reflection by many notches, the RX exploits the DFE with the largest tap count of 20 that has been never used in single-ended signaling before. Low-power circuit techniques such as a current-integrating summer and double-tail sense amplifiers were adequately adopted and engineered to reduce large power dissipation by many taps. The RX was fabricated in a 65-nm CMOS technology and occupies only 0.014 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The energy efficiency was measured to be only 2.9 pJ/b at 7.8 Gb/s with 0.9-V supply, proving that fast single-ended signaling through a highly reflective channel is feasible at low energy cost by many-tap DFE if low-power circuit techniques are adequately applied. The horizontal and vertical eye sizes were measured to be 0.12 UI and 34 mV, respectively, at a bit error rate of <; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> .
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A 7Gb/s 9.3mW 2-Tap Current-Integrating DFE Receiver
Matt Park, John F. Bulzacchelli, Michael P. Beakes et al. · 2007 · 73 citations
Engineering, Computer Engineering, Electrical Engineering +17