Data-Retention-Voltage-Based Analysis of Systematic Variations in SRAM SEU Hardness: A Possible Solution to Synergistic Effects of TID

TLDR

Single‑event upset (SEU) hardness varies across dies, wafers, and lots, even after fabrication, due to post‑fabrication variations such as total ionizing dose (TID) effects that are a concern for integrated circuits in space and nuclear radiation environments. The study demonstrates that the data‑retention voltage can be used to mitigate TID effects on SRAM SEU hardness. The authors measured the data‑retention voltage and adjusted the power‑supply voltage based on its relationship to predict and counteract TID‑induced SEU variations. Experiments confirmed that measuring the data‑retention voltage predicts TID‑induced SEU cross‑section variations, and adjusting the supply voltage can cancel these variations, indicating a potential flight‑time mitigation strategy.

Abstract

Single-event upset (SEU) hardness varies across dies, wafers, and lots—even just after fabrication and further across time. Mechanisms of postfabrication variations include total ionizing dose (TID) effects, which are caused by long-term radiation exposure. This synergistic effect of TID on SEU hardness is a particular concern in integrated circuits used in space and nuclear radiation environments. This article shows that an electrical parameter called the data-retention voltage is useful in dealing with such TID effects on the SEU hardness of static random access memories (SRAMs), which are known to be particularly radiation-sensitive. Experiments showed that TID-induced variations in SRAM SEU hardness, i.e., variations in SEU cross sections, were predicted by measuring the data-retention voltage. In addition, these variations were canceled out by adjusting the power supply voltage according to its interesting relationship to the data-retention voltage. Results suggest that it might be possible in flight to predict and cancel out SEU hardness variations caused by TID and other synergistic effects.