High ${I}_{\text{ON}}$ and ${I}_{\text{ON}}$ /${I}_{\text{OFF}}$ Ratio Enhancement-Mode Buried ${p}$ -Channel GaN MOSFETs on ${p}$ -GaN Gate Power HEMT Platform

Abstract

Enhancement-mode (E-mode) buried p-channel GaN metal-oxide-semiconductor field-effect-transistors (p-GaN-MOSFET's) with threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ) of -1.7 V, maximum ON-state current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) of 6.1 mA/mm and I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> are demonstrated on a standard p-GaN/AlGaN/GaN-on-Si power HEMT substrate. An oxygen plasma treatment (OPT) was deployed to the gated p-GaN region where a relatively thick (i.e. 31 nm) GaN is retained without aggressive gate recess. The OPT converts the top portion of the GaN layer to be free of holes so that only the bottom portion remains p-type while being spatially separated from the etched GaN surface and gate-oxide/GaN interface. As a result, E-mode operation is enabled while a high-quality p-channel is retained. Multi-energy fluorine ion implantation was implemented for planar isolation of GaN p-channel FETs with mesa edges and sidewalls eliminated. Consequently, high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio is obtained.