2018 · 13 citations · 19 references
EngineeringComputer EngineeringInterconnection NetworksSystem-on-chip DesignVlsi DesignInterconnect ArchitectureInterconnect DesignNetwork-on-chip DesignPower ManagementPower-aware DesignVery-large-scale Integration LayoutAccuracyCycle-accurate ModelingMicroarchitectural SimulationPower ConsumptionPower Consumption ModelingPower Modeling And EstimationTemperature Inversion EffectsVirtual Channels
Ever increasing number of on-chip cores magnifies the need for efficient Network on Chip (NoC) architecture designs. To have a wide design space exploration, accurate simulators play a key role to estimate power consumption, area and temperature profile of NoCs. Access-Noxim as one of the well-known NoC simulators is used by several researchers to perform cycle-accurate simulations for different NoC architectures. However, this simulator lacks power and thermal accuracy due to ignoring the temperature/power cross impact which is also known as Temperature Effect Inversion. This paper presents PAT- Noxim, to address this source of inaccuracy in the Access- N oxim simulator. PAT-Noxim uses architecture-level tools to calculate power consumption and area more accurately with considering the power/temperature cross impact. PAT-Noxim simulator now supports several architectural alternatives including pipelined and non-pipelined routers, and arbitrary number of virtual channels per each port. In addition, the PAT-Noxim renders results for a wide ranges of VLSI fabrication technologies from 90 nm down to 22 nm. Obtained results by the PAT-Noxim simulator indicate 5.45% and 11.6% more accuracy in estimation of power consumption and temperature parameters respectively.
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Sheng Li, Jung Ho Ahn, Richard Strong et al. · 2009 · 2.4K citations
A detailed and flexible cycle-accurate Network-on-Chip simulator
Nan Jiang, James Balfour, Daniel Becker et al. · 2013 · 771 citations