Temperature and supply Voltage aware performance and power modeling at microarchitecture level

TLDR

Performance and power are primary design concerns, with temperature and supply voltage affecting circuit delay and, as technology scales, causing leakage power to rise exponentially. This work investigates microarchitecture‑level temperature and voltage aware performance and power modeling. We develop a leakage power model that scales with temperature and voltage, analyze thermal runaway due to their interdependence, and explore optimal voltage scaling for performance under dynamic power and thermal management across packaging options. Leakage and total energy vary by 38 % and 24 % between 65 °C and 110 °C, and temperature‑aware modeling prevents thermal control failures and performance penalties up to 5.24 %; dynamic power and thermal management targeting the common‑case thermal scenario boosts performance by 6.59 % versus worst‑case, while optimal Vdd may not be the maximum allowed and advanced cooling can further improve throughput.

Abstract

Performance and power are two primary design issues for systems ranging from server computers to handhelds. Performance is affected by both temperature and supply voltage because of the temperature and voltage dependence of circuit delay. Furthermore, as semiconductor technology scales down, leakage power's exponential dependence on temperature and supply voltage becomes significant. Therefore, future design studies call for temperature and voltage aware performance and power modeling. In this paper, we study microarchitecture-level temperature and voltage aware performance and power modeling. We present a leakage power model with temperature and voltage scaling, and show that leakage and total energy vary by 38% and 24%, respectively, between 65/spl deg/C and 110/spl deg/C. We study thermal runaway induced by the interdependence between temperature and leakage power, and demonstrate that without temperature-aware modeling, underestimation of leakage power may lead to the failure of thermal controls, and overestimation of leakage power may result in excessive performance penalties of up to 5.24%. All of these studies underscore the necessity of temperature-aware power modeling. Furthermore, we study optimal voltage scaling for best performance with dynamic power and thermal management under different packaging options. We show that dynamic power and thermal management allows designs to target at the common-case thermal scenario among benchmarks and improves performance by 6.59% compared to designs targeted at the worst case thermal scenario without dynamic power and thermal management. Additionally, the optimal V/sub dd/ for the best performance may not be the largest V/sub dd/ allowed by the given packaging platform, and that advanced cooling techniques can improve throughput significantly.