True 7nm Platform Technology featuring Smallest FinFET and Smallest SRAM cell by EUV, Special Constructs and 3<sup>rd</sup> Generation Single Diffusion Break

Wonbeen Jeong, Do Hyun Kwon, Kab-Jin Nam, Woojin Rim, M. S. Jang, H.T. Kim, Y.W. Lee, J.S. Park, E.C. Lee, Daewon Ha,

2018 · 51 citations · 1 references

Concepts

Abstract

7nm platform technology that takes full advantage of EUV lithography was developed, where EUV was straightforwardly used for single patterning of MOL and BEOL, not just as a means for cutting of SADP/SAQP. The combination of 27nm fin pitch (FP) and 54nm contacted poly pitch (CPP) as well as the high density SRAM cell size of 0.0262 um <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> is the smallest in the reported FinFET platform. Further scaling is secured with special constructs and the 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> generation single diffusion break. Full working of 256M bit SRAM and large-scale logic test chip was demonstrated with guaranteed reliability.

References

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