Proceedings of the International Symposium on Low Power Electronics and Design · 2018 · 17 citations · 28 references
EngineeringComputer EngineeringComputer ScienceComputer NetworksEnergy ManagementLow-power DesignNetwork-on-chip DesignPower GatingPower ManagementPower-aware DesignRoutingRouting AlgorithmsColumnsIdle Time ReductionIdle TimeoutPower ConsumptionPower-aware RoutingPower-efficient RoutingScalable Routing ArchitecturesStatic Power Dissipation
Due to high aggregate idle time of Networks-on-Chip (NoCs) routers in practical applications, power-gating techniques have been proposed to combat the ever-increasing ratio of static power. Nevertheless, the sporadic packet arrivals compromise the effectiveness of power-gating by incurring significant latency and energy overhead. In this paper, we propose a Scalable Pivot-based On/Off Gating Engine (SPONGE) which efficiently manages power-gating decisions and routing mechanism by adaptively selecting a small set of powered-on columns of routers and keeping the others in power-gated state. To this end, a router architecture augmented with a novel routing algorithm is proposed in which a packet can traverse powered-off routers without waking them up, and can only turn in predetermined powered-on routers. Experimental results on SPLASH-2 benchmarks demonstrate that, compared to the conventional power-gating method, SPONGE on average not only improves static power consumption by 81.7%, it also improves average packet latency by 63%.
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Nathan Binkert, Bradford M. Beckmann, Gabriel Black et al. · ACM SIGARCH Computer Architecture News · 2011 · 4.9K citations
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Yatin Hoskote, Sriram Vangal, A. Singh et al. · IEEE Micro · 2007 · 531 citations