A. Singh

An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS

Sriram Vangal, Jason Howard, Gregory Ruhl et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007 · 633 citations

Hardware Security, System On Chip, Electrical Engineering +14

An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS

Sriram Vangal, Jason Howard, Greg Ruhl et al. · IEEE Journal of Solid-State Circuits · 2008 · 625 citations

Engineering, Vlsi Design, Computer Architecture +16

A 5-GHz Mesh Interconnect for a Teraflops Processor

Yatin Hoskote, Sriram Vangal, A. Singh et al. · IEEE Micro · 2007 · 529 citations

Engineering, Computer Architecture, Interconnection Network Architecture +21

A 5-GHz Mesh Interconnect for a Teraflops Processor

Yatin Hoskote, Sriram Vangal, A. Singh et al. · IEEE Micro · 2007 · 517 citations

Engineering, Computer Architecture, Interconnection Network Architecture +21

A 5.1GHz 0.34mm<sup>2</sup> Router for Network-on-Chip Applications

Sriram Vangal, A. Singh, Jason Howard et al. · 2007 · 30 citations

Interconnect Modeling, Electrical Engineering, Raw Bandwidth +14