First Demonstration of a Logic-Process Compatible Junctionless Ferroelectric FinFET Synapse for Neuromorphic Applications

Myungsoo Seo, Min‐Ho Kang, Seung‐Bae Jeon, Hagyoul Bae, Jae Hur, Byung Chul Jang, Seokjung Yun, Seongwoo Cho, Wu‐Kang Kim, Myung‐Su Kim,

IEEE Electron Device Letters · 2018 · 161 citations · 17 references

Concepts

Abstract

A highly scalable synapse device based on a junctionless (JL) ferroelectric (FE) FinFET is presented for neuromorphic applications. The synaptic behaviors of the JL metal-ferroelectric-insulator-silicon FinFET were experimentally demonstrated after verifying the ferroelectric characteristics of the HfZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>X</i></sub> (HZO) film using a metal-ferroelectric-metal capacitor. The fabricated synapse showed distinguishable polarization switching behaviors with gradually controllable channel conductance. From neural network simulations using the proposed JL FE FinFET as synapses, the pattern recognition accuracy for hand-written digits was validated to be approximately 80% for neuromorphic applications.

References

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