A 144-Mb, eight-level NAND flash memory with optimized pulsewidth programming

Abstract

We report a fast-programming, compact sense and latch (SL) circuit to realize an eight-level NAND flash memory. Fast programming is achieved by supplying optimized voltage and pulsewidth to the bit lines, according to the programming data. As a result, all data programming is completed almost simultaneously, and 0.67-MB/s program throughput, which is 1.7 times faster than conventional program throughput, is achieved. The compact layout of the SL circuit is made possible by four 3-bit latches sharing one unit of the read/verify control circuit. Using these techniques, we fabricated a 144-Mb, eight-level NAND flash memory using a 0.35-/spl mu/m CMOS process, resulting in a 104.2-mm/sup 2/ die size and a 1.05-/spl mu/m/sup 2/ effective cell size.