IEEE Journal of Solid-State Circuits · 2004 · 63 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringMemoryMicroelectronicsSemiconductor DevicesMemory DevicesMemory Subsystem DesignCopper MetallizationMagnetoresistive Random-access MemoryMemory Circuit DesignMetallizationRandom Access Memory (Ram)Random-access Memory
A 128-kb magnetic random access memory (MRAM) test chip has been fabricated utilizing, for the first time, a 0.18-/spl mu/m V/sub DD/=1.8 V logic process technology with Cu metallization. The presented design uses a 1.4-/spl mu/m/sup 2/ one-transistor/one-magnetic tunnel junction (1T1MTJ) cell and features a symmetrical high-speed sensing architecture using complementary reference cells and configurable load devices. Extrapolations from test chip measurements and circuit assessments predict a 5-ns random array read access time and random write operations with <5-ns write pulse width.
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W. Reohr, H. Honigschmid, R. P. Robertazzi et al. · IEEE Circuits and Devices Magazine · 2002 · 74 citations
Natural Sciences, Computer Engineering, Materials Science +16
A low power 1 Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects
M. Durlam, P. Naji, A. Omair et al. · 2003 · 46 citations
Engineering, Computer Engineering, Electrical Engineering +16
Fully integrated 64 Kb MRAM with novel reference cell scheme
Hongsik Jeong, Hyojung Kim, Jongill Hong et al. · 2002 · 13 citations
Engineering, Electrical Engineering, Electronic Materials +12