Publication | Closed Access
Industrialised SPAD in 40 nm technology
56
Citations
5
References
2017
Year
Unknown Venue
MiniaturizationEngineeringDevice IntegrationVacuum DeviceWafer Scale ProcessingAdvanced Packaging (Semiconductors)NanoelectronicsStacked TechnologyElectronic PackagingMaterials Engineering3D Ic ArchitectureElectrical EngineeringSemiconductor Device FabricationMicroelectronicsNm TechnologyMicrofabricationApplied PhysicsAdvanced 40Optoelectronics
We present the first mature SPAD device in advanced 40 nm technology. For the first time we also show dedicated microlens fabrication on top of SPADs integrated in the same technology node. A high fill factor >70% is reported together with a low DCR median of 50cps at room temperature and a high PDP of 5% at 840nm. By taking advantage of the small digital node, a larger amount of logic can be integrated inside the pixel, which is ready to be ported to a 3D stacked technology, where the logic is implemented in a fully digital dedicated layer [1].
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