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10nm high performance mobile SoC design and technology co-developed for performance, power, and area scaling
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2017
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Low-power ElectronicsSystem On ChipElectrical EngineeringEngineeringVlsi DesignMachine LearningTechnology ScalingFinfet TechnologyComputer ArchitectureComputer EngineeringArea ScalingMicroelectronicsBeyond CmosTechnology DefinitionTechnology Co-optimization
The industry's first 10nm low power high performance mobile SoC has been successfully ramped in production. Thanks to a thorough design-technology co-development, 10nm SoC is 16% faster, 37% smaller, and 30% lower power than its 14nm predecessor. The latest SoC features a gigabit class modem and is set to advance AR/VR, AI, machine learning, and computing. 10nm FinFet technology scaling challenges such as sharply increased wiring resistance and variation and strong layout stress effects are discussed to illustrate design and technology co-development from technology definition to product ramp stage is imperative to realize scaling entitlements.