Publication | Closed Access
FOI FinFET with ultra-low parasitic resistance enabled by fully metallic source and drain formation on isolated bulk-fin
43
Citations
2
References
2016
Year
Unknown Venue
EngineeringSilicon On InsulatorInterconnect (Integrated Circuits)Semiconductor DeviceNanoelectronicsMaterials ScienceSemiconductor TechnologyElectrical EngineeringNanotechnologyChannel LeakageIsolated Bulk-finSemiconductor Device FabricationMicroelectronicsLarge Parasitic ResistanceApplied PhysicsFoi FinfetDrain FormationBeyond CmosBulk Fets
The large parasitic resistance has become a critical limiting factor to on current (I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf> ) of FinFET and nanowire devices. Fully metallic source and drain (MSD) process is one of the most promising solutions but it often suffers from intolerant junction leakage in bulk FETs. In this paper, fully MSD process on fin-on-insulator (FOI) FinFET is investigated extensively for the first time. By forming fully Ni(Pt) silicide on physically isolated fins, about 90% reduction in contacted resistivities (R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</inf> s) and 55% reduction in sheet resistances (R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</inf> s) are achieved without obvious junction leakage degradation. As a consequence, Ion of transistor, with gate length (L <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</inf> ) of 20nm, is increased 30 times, up to 547μA/μm for NMOS and 324 μA/μm for PMOS, respectively. Excellent controls of SCE and channel leakage with 47% DIBL, 32% SS and 2.5% device leakages reductions over the counterpart of conventional bulk FinFETs are also obtained. Meanwhile, the fully MSD process induces clear tensile stress into narrow fin-channel, resulting in enhanced electron mobility in NMOS. A further improvement in PMOS drive ability (486μA/μm) by using Schottky barrier source and drain (SBSD) technology is also explored.
| Year | Citations | |
|---|---|---|
Page 1
Page 1