Concepedia

Author

Changliang Qin

Chinese Academy of Sciences

Also Known As

C. L. Qin, Changliang Qin, Yongkui Zhang

24

Publications

287

Citations

10

H-Index

23

Concepts

All Affiliations

Chinese Academy of SciencesInstitute of MicroelectronicsKTH Royal Institute of TechnologyUniversity of TehranUniversity of Chinese Academy of Sciences
CQ

About

Changliang Qin is an author at Chinese Academy of Sciences specializing in engineering, nanoelectronics, and electrical engineering.

Top Concepts

#ConceptH-IndexPublicationsCitations

1

Engineering

9

9

214

2

Applied Physics

8

8

191

3

Electrical Engineering

8

8

191

4

Materials Science

3

3

111

5

Mechanical Engineering

1

1

23

Changliang Qin

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10

Publications

244

Citations

10

H-Index

YearCitations

Optimization of SiGe selective epitaxy for source/drain engineering in 22 nm node complementary metal-oxide semiconductor (CMOS)

G. L. Wang, M. Moeen, Ahmad Abedin,

Journal of Applied Physics

2013

45

FOI FinFET with ultra-low parasitic resistance enabled by fully metallic source and drain formation on isolated bulk-fin

Qingzhu Zhang, Huaxiang Yin, Jun Luo,

2016

43

Integration of Highly Strained SiGe in Source and Drain with HK and MG for 22 nm Bulk PMOS Transistors

Guilei Wang, Jun Luo, Changliang Qin,

Nanoscale Research Letters

2017

30

Study of SiGe selective epitaxial process integration with high-k and metal gate for 16/14nm nodes FinFET technology

Guilei Wang, Changliang Qin, Huaxiang Yin,

Microelectronic Engineering

2016

25

Impact of pattern dependency of SiGe layers grown selectively in source/drain on the performance of 14nm node FinFETs

Changliang Qin, Guilei Wang, Mohammadreza Kolahdouz,

Solid-State Electronics

2016

23

Laser Powder Bed Fusion of GH4099 Superalloy: Parameter Optimization and Effect of Heat Treatment on Microstructure and Mechanical Properties

Yunfei Nie, Qian Tang, Zhonghua Li,

Additive Manufacturing Frontiers

2024

23

Study of sigma-shaped source/drain recesses for embedded-SiGe pMOSFETs

Changliang Qin, Huaxiang Yin

Microelectronic Engineering

2017

14

Fabrication and Characterization of p-Channel Charge Trapping Type FOI-FinFET Memory with MAHAS Structure

Zhaozhao Hou, Qingzhu Zhang, Huaxiang Yin,

ECS Journal of Solid State Science and Technology

2017

14

Growth of SiGe layers in source and drain regions for 10 nm node complementary metal-oxide semiconductor (CMOS)

Guilei Wang, Mohammadreza Kolahdouz, Jun Luo,

Journal of Materials Science Materials in Electronics

2019

14

Impact of pattern dependency of SiGe layers grown selectively in source/drain on the performance of 22nm node pMOSFETs

Guilei Wang, M. Moeen, A. Abedin,

Solid-State Electronics

2015

13

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