RRAM variability and its mitigation schemes

Abstract

Emerging technologies such as RRAMs are attracting significant attention due to their tempting characteristics (such as high scalability, CMOS compatibility and non-volatility) to replace the current conventional memories. However, process variation due to nano-scale structure poses major challenges on both reliability and yield. This has led to the investigation of new robust design strategies at the circuit and system level. This paper first reviews the RRAM variability phenomenon and the state-of-the art variation tolerant techniques at the circuit level. Thereafter, it analyzes the impact of variability on memory reliability, and proposes a variation-monitoring circuit that discerns the reliable memory cells affected by process variability.