Impact of Hf concentration on performance and reliability for HfSiON-CMOSFET

Abstract

65 nm gate length HfSiON-CMOSFET was fabricated with various Hf concentrations and gate spacers in view of device performance and reliability. The negative charges are generated in HfSiON/Si-substrate interface at the gate edge region for HfSiON with high Hf concentration. SiN offset spacer suppresses the charge generation and the degradation of drive current. Even so, HfSiON with low Hf concentration is higher at performance and reliability than that with high one. Moreover, the optimized HfSiON shows scalability of up to hp45 nm low standby power (LSTP).