1.8 million transistor CMOS ASIC fabricated in a SiGe BiCMOS technology

Abstract

To investigate the potential of high level integration in SiGe BiCMOS, we have fabricated a 1.8 million transistor CMOS ASIC testsite (8.06 mm/spl times/8.06 mm) alongside various SiGe heterojunction bipolar transistor (HBT) circuits and yield monitor structures. The ASIC testsite was used to validate the ASIC library elements, perform hardware to model correlation, and for reliability, ESD, hot electron and thermal cycle stressing. We have verified that the incorporation of high-speed bipolar devices does not degrade the operation and reliability of VLSI CMOS circuits, resulting in an ideal BiCMOS process to fabricate a single-chip radio for wireless communications. This circuit represents the largest circuit ever built in a SiGe BiCMOS technology.