A half-micron CMOS technology using ultra-thin silicon on insulator

Abstract

A 0.5 mu m CMOS technology on ultra-thin film SIMOX SOI (silicon on insulator) material is described. The technology, material quality, and device properties are discussed. The impact of TiSi/sub 2/ salicidation on the NMOS device breakdown, self-heating, and anomalous hot carrier degradation of NMOS devices is discussed in detail. Furthermore, the successful fabrication of a large circuit with 70000 transistors using a 0.5 mu m technology on ultra-thin SOI material is presented. >