Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS

Abstract

Low-power embedded memory and an ARM Cortex-M0 core that operate at 30 MHz were fabricated in combination with a 60-nm c-axis aligned crystalline indium-gallium-zinc oxide FET and a 65-nm Si CMOS. The embedded memory adopted a structure in which oxide semiconductor-based 1T1C cells are stacked on Si sense amplifiers. This memory achieved a standby power of 3 nW while retaining data and an active power of 11.7 μW/MHz by making each bitline as short as each sense amplifier. The M0 core adopted the flip-flop in which an oxide semiconductor-based 3T1C cell is stacked on the Si scan flip-flop cell without area overhead and achieved a standby power of 6 nW while retaining data. The combination of the embedded memory and the M0 core provided high-performance, low-power Internet of Things devices operating with a broad range of active standby power ratios.