Experimental demonstration of the active trench layout tuned 1200V CSTBT™ for lower dV/dt surge and turn-on switching loss

Abstract

Optimization of a cell structure affecting gate capacitance must have an important role to upgrade usability of IGBT at high frequency operation. In this paper, we report an experimental study on the IGBT cell structures with various arrangements of active trenches connected to gate. Utilizing the advanced active trench layout with well-balanced capacitance realized to lower dV/dt surge and turn-on switching loss.