Publication | Closed Access
An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip
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Citations
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References
2016
Year
High ResolutionEngineeringMeasurementReal-time System DesignHardware AlgorithmComputer ArchitectureEducationFpga ChipClock SynchronizationHardware SecurityTime DisseminationClock RecoveryCalibrationTiming AnalysisSystems EngineeringHigh PrecisionInstrumentationTimed SystemPerformance ImprovementTime CounterComputer EngineeringTime MetrologyFpga DesignSignal ProcessingNetwork TimingReal-time Systems
We present the design, operation, and test results of a new integrated time interval (TI) counter that provides high resolution (1.9 ps), low measurement uncertainty (below 4.5-ps rms in advanced measurement modes), and wide measurement range (above 1 h, easily extendable). Fundamental for the counter, TI measurements are simultaneously performed in eight independent channels, while the advanced configuration of input channels improves either the precision (up to 3 ps) or the measurement speed (up to 91.2 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> registered events/s). The functional flexibility and high speed are achieved based on the timestamp (TS) principle that makes possible registering on the common time scale events appearing at counter inputs and then measuring the time intervals between any registered events. The high precision is obtained by employing two-stage inner interpolation with an eight-phase clock in the first stage of interpolation and an equivalent time coding delay line in the second one. The time counter is integrated in a single, costeffective field programmable gate array chip manufactured in a 28-nm CMOS process.
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