IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2016 · 39 citations · 46 references
EngineeringAstronomyElectrical EngineeringAnalog ElectronicsInstrumentationRadio AstronomyAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsLow-noise Circuit DesignLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital ConvertersCmos Analog Circuit DesignCmos Analog Integrated CircuitsInterleavingPower ConsumptionTelescopes
This paper presents a 5-bit noninterleaved time-based analog-to-digital converter (ADC), which operates at a 5-GS/s rate. The ADC is designed for the use in radio-astronomy telescopes, for which time interleaving is not acceptable. The ADC employs a dynamic, differential voltage-to-time converter, a folded-flash time-to-digital converter (TDC), and calibration circuitry. To generate reference delays, the calibration circuitry utilizes a delay-time reference network, which is designed to map the input voltage range into 16 equal time intervals that are used for the calibration of the TDC. The 65-nm CMOS ADC achieves the Signal-to-noise plus distortion ratio/spurious-free dynamic range of 27/32 dB at Nyquist, an effective number of bits (ENOB) of 4.7 bit at low frequencies and 4.1 bit at high frequencies with a power consumption of 21.5 mW at Nyquist.
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P. E. Dewdney, Peter J. Hall, R. T. Schilizzi et al. · Proceedings of the IEEE · 2009 · 1.2K citations · Full text
Natural Sciences, Astronomy, Physics +14