2015 · 12 citations · 13 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureCryptographyField-programmable Gate ArraysConfigurable Logic BlocksCryptographic AlgorithmsCryptographic ArchitectureField-programmable Gate Array ArchitectureFpga ArchitectureLookup TablesAdvanced Encryption StandardArithmetic Logic Unit ArchitectureArithmetic Of Finite FieldsEncryptionField-programmable Gate Arrays (Fpgas)Field-programmable Logic ArraysS-box Design
This paper present method for constructions of the S-Box for Advanced Encryption Standard (AES) algorithm using composite field arithmetic in GF(((2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). It is advantageous to implement the composite field arithmetic (CFA) on Field Programmable Gate Array for AES algorithm. Moreover, architectural implementation of S-Box using CFA reduces the hardware in terms of gates count as compared with that classical Look Up Table based S-Box for AES algorithm. The composite fields are constructed by decomposition methodology. However, an isomorphic mapping function to map the GF (2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> ) representation to its composite field in GF (((2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) and eight such mappings exist for each construction. The proposed CFA based S-Box implementation on hardware provides less area by 50% and low power consumption compared to the classical S-Box.
13