Publication | Closed Access
130 nm-technology, 0.25 ¿m<sup>2</sup>, 1T1C FRAM Cell for SoC (System-on-a-Chip)-friendly Applications
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Citations
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References
2007
Year
Unknown Venue
Fram CellMb FramEngineeringVlsi DesignMiniaturizationWorld Smallest 0.25Integrated CircuitsWafer Scale ProcessingAdvanced Packaging (Semiconductors)NanoelectronicsNew Fram CellMaterials ScienceElectrical EngineeringNanotechnologyComputer EngineeringMicroelectronicsLow-power ElectronicsSystem On ChipMicrofabricationApplied PhysicsNanofabrication
We have successfully demonstrated a world smallest 0.25 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> cell 1T1C 64 Mb FRAM at a 130 nm technology node. This small cell size was achieved by scaling down a capacitor stack, using the following technologies: a robust glue layer onto the bottom electrode of a cell capacitor; 2-D MOCVD PZT technology, novel capacitor-etching technology; and a top-electrode-contact-free (TEC-free) scheme. The new FRAM cell is suitable for a mobile SoC (System-on-a-Chip) application. This is due to realization of four metal technology required for high-speed logic devices. As a result, the remanent polarization value of 32 μC/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> was achieved after full integration and the sensing window was evaluated to 370 mV at 85 °C, 1.3 V.
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