Electronics Letters · 2000 · 39 citations · 6 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsMicrofabricationMicrowave EngineeringHigh-frequency Semiconductor DevicesIntegrated Circuit DesignIntegrated Circuit FabricationMicrowave Integrated CircuitsMicrowave Semiconductor DevicesRadio-frequency Integrated CircuitsCapacitanceFlat StructuresMicrowave Integrated Circuit DesignParasitic CapacitanceParasitic Capacitance ReductionSiliconSilicon Microwave Integrated CircuitsSurface Tension Modification
A new technique is presented for the fabrication of three-dimensional metal structures by surface tension-induced folding of flat structures. This fully parallel, low temperature method is suitable for post-processing on integrated circuits, and in a first application is used to decouple inductors for radio- and microwave-frequency integrated circuits from their substrates, to reduce losses and parasitic capacitance. Meandered microwave inductors have been fabricated on a low resistivity silicon substrate, and a peak Q of 10 was measured, at 1 GHz, for a 2 nH inductor standing vertically, compared to a peak Q of 4 for the same structure before self assembly.
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Electromagnetically shielded high-Q CMOS-compatible copper inductors
Hongrui Jiang, J. Andrew Yeh, Ye Wang et al. · 2002 · 29 citations