Technology CAD evaluation of BiCMOS protection structures operation including spatial thermal runaway

Abstract

A 2-D simulation approach that takes into account the 3D effects of electro-thermal instability during ESD operation, is presented. The method is used to provide physical evaluation of a safe operation regime for BiCMOS ESD protection structures and circuits. ESD stress induced hot spot formation using 3D simulation has been presented for the case of a simplified snapback n-MOS device.