2003 · 13 citations · 5 references
EngineeringComputer EngineeringComputer ScienceFault ToleranceFault-tolerant ComputingField-programmable Gate ArraysConfigurable Logic BlocksEmbryonic DevelopmentField-programmable Gate Array ArchitectureFpga ArchitectureLogic SynthesisAsynchronous Circuit DesignAsynchronous Sequential CircuitsFault-tolerant Fpga ArchitectureField-programmable Gate Arrays (Fpgas)Field-programmable Logic ArraysFpga PrototypingSynchronous Circuit DesignSynchronous Design
Embryonic arrays display the desirable biological characteristics of fault-tolerance and a complex structure. They do not generally make use of a further biological characteristic; fundamentally asynchronous operation. Further to the inherent advantages of an asynchronous approach, scalability and reliability are perceived as benefits pertinent to embryonic designs. This paper advances a simulated asynchronous embryonic design by realising its functional logic using a Xilinx Virtex FPGA. The AARDVArc program augments the standard design tools to achieve this macromodule based implementation. The design is compared to a similar synchronous design in terms of its logic requirement and performance. Although requiring additional resources and operating less quickly than its synchronous counterpart, this work forms the basis for a fully asynchronous practical embryonic array.
5
Asynchronous design methodologies: an overview
Scott Hauck · Proceedings of the IEEE · 1995 · 545 citations
Engineering, Computer Engineering, Electrical Engineering +12
Toward robust integrated circuits: The embryonics approach
Daniel Mange, Moshe Sipper, André Stauffer et al. · Proceedings of the IEEE · 2000 · 201 citations
Four state asynchronous architectures
A. McAuley · IEEE Transactions on Computers · 1992 · 47 citations