An Internally-Matched High-Isolation CMOS SPDT Switch Using Leakage Cancellation Technique

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> An internally-matched single-pole double-throw (SPDT) switch with high isolation is presented. The high isolation is resulted from the leakage cancellation by employing a compensation circuit, which also achieves impedance match for all ports. The SPDT chip, implemented in a 0.18-<formula formulatype="inline"> <tex>$\mu$</tex></formula>m CMOS process, achieves a measured isolation of 72 dB, an insertion loss of 1.1 dB, return losses better than 10 dB at all ports and <formula formulatype="inline"><tex>${P} _{1{\rm dB}}$</tex></formula> of 19.3 dBm at 1.9 GHz. </para>